NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 50

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

Intel
DS
50
®
6300ESB I/O Controller Hub
This document contains these chapters:
Chapter 1, “Introduction”
on manual organization.
Chapter 3, “Signal Description”
ICH signal. Signals are arranged according to interface. Details are provided about the
drive characteristics (Input/Output, Open Drain, etc.) of all signals.
Chapter 2, “Intel® 6300ESB ICH and System Clock Domains”
clock domain associated with the Intel
system.
Chapter 4, “Intel® 6300ESB ICH Power Planes and Pin States”
of signals, their associated power well, their logic level in each suspend state, and their
logic level before and after reset.
Chapter 5, “Functional Description”
the Intel
abbreviated using the following nomenclature; Bus:Device:Function. This manual
abbreviates buses as B0 and B1, devices as D8, D29, D30 and D31 and functions as F0,
F1, F2, F3, F4, F5, F6 and F7. For example Device 31 Function 5 is abbreviated as
D31:F5, Bus 1 Device 8 Function 0 is abbreviated as B1:D8:F0. Generally, the bus
number will not be used, and may be considered to be Bus 0. Note that the Intel
6300ESB ICH’s external PCI bus is typically Bus 1, but may be assigned a different
number depending upon system configuration.
Chapter 6, “Register and Memory Mapping”
I/O ranges, variable I/O ranges, and memory ranges decoded by the Intel
ICH.
Chapter 7, “Hub Interface to PCI Bridge Registers (D30:F0)”
description of all registers that reside in the Hub Interface to PCI bridge. This bridge
resides at Device 30, Function 0 (D30:F0).
Chapter 8, “LPC I/F Bridge Registers (D31:F0)”
registers that reside in the LPC bridge. This bridge resides at Device 31, Function 0
(D31:F0). This function contains registers for many different units within the Intel
6300ESB ICH including DMA, Timers, Interrupts, CPU Interface, GPIO, Power
Management, System Management and RTC.
Chapter 9, “IDE Controller Registers (D31:F1)”
registers that reside in the IDE controller. This controller resides at Device 31, Function
1 (D31:F1).
Chapter 10, “USB UHCI Controllers Registers”
registers that reside in the three UHCI host controllers. These controllers reside at
Device 29, Functions 0, 1 and 2 (D29:F0/F1/F2).
Chapter 11, “USB EHCI Controller Registers (D29:F7)”
of all registers that reside in the EHCI host controller. This controller resides at Device
29, Function 7 (D29:F7).
Chapter 12, “SMBUS Controller Registers (D31:F3)”
all registers that reside in the SMBus controller. This controller resides at Device 31,
Function 3 (D31:F3).
®
6300ESB ICH. All PCI buses, devices, and functions in this manual are
introduces the Intel
provides a detailed description of each Intel
provides a detailed description of the functions in
®
6300ESB ICH in an Intel
provides an overview of the registers, fixed
®
provides a detailed description of all
provides a detailed description of all
6300ESB ICH and provides information
provides a detailed description of all
provides a detailed description of
provides a detailed description
provides a detailed
provides a list of each
provides a complete list
Order Number: 300641-004US
®
6300ESB ICH-based
Intel
®
6300ESB ICH—1
®
November 2007
®
6300ESB
6300ESB
®
®