NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 626

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

Table 551. Offset 68h: WDT Lock Register
Intel
DS
626
Bits
Default Value:
7:3
2
1
0
®
6300ESB I/O Controller Hub
Lockable:
Device:
Offset:
WDT_TOUT_CNF
WDT_ENABLE
WDT_LOCK
Reserved
29
68h
00h
No
Name
Reserved.
Timeout Configuration: This register is used to choose the
functionality of the timer.
0 = Watchdog Timer Mode: When enabled (i.e., WDT_ENABLE
1 = Free Running Mode: WDT_TOUT# will change from
In free running mode it is not necessary to reload the timer
as it is done automatically every time the decrementer
reaches zero.
The following bit enables or disables the WDT.
0 = Disabled (Default)
1 = Enabled
NOTE: This bit cannot be modified if WDT_LOCK has been
NOTE: In free-running mode, Preload Value 2 is reloaded into
WARNING: Software should ensure that a timeout is not
about to occur before disabling the timer. A reload sequence
is suggested.
Setting this bit will lock the values of this register until a hard
reset occurs or power is cycled.
0 = Unlocked (Default)
1 = Locked
This is a Write-Once bit. It cannot be changed until either
power is cycled or a hard reset occurs.
goes from ‘0’ to ‘1’) the timer will reload Preload Value 1
and start decrementing. (Default) Upon reaching the
second stage timeout, the WDT_TOUT# is driven low
once and will not change again until Power is cycled or a
hard reset occurs.
previous state when the next timeout occurs. The timer
ignores the first stage. The timer only uses Preload Value
2. In this mode the timer is restarted whenever
WDT_ENABLE goes from a ’0’ to a 1. This means that the
timer will reload Preload Value 2 and start decrementing
every time it is enabled.
set.
the down-counter every time WDT_ENABLE goes from
‘0’ to ‘1’. In WDT mode, Preload Value 1 is reloaded
every time WDT_ENABLE goes from ‘0’ to ‘1’ or the
WDT_RELOAD bit is written using the proper sequence
of writes (see Register Unlocking Sequence).
Power Well:
Description
Attribute:
Function:
Size:
4
Read-Write/Write Once
8-bit
Core
Order Number: 300641-004US
Intel
®
6300ESB ICH—16
November 2007
Access
R/WO
R/W
R/W
RO