NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 693

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

18—Intel
18.8.6
18.8.6.1 Completer Attributes
Table 623. Intel
18.8.6.2 Requirements for Accepting Split Completions
18.8.6.3 Split Completion Messages
Table 624. Split Completion Messages
18.8.6.4 Arbitration Among Multiple Split Completions
November 2007
Order Number: 300641-004US
®
6300ESB ICH
Split Transactions
The Intel
ID matches the bridge, but the Tag does not match that of any outstanding requests
from this device, or when the byte count exceeds that of the Split Request.
The Hub Interface accepts more than one completion required request from the Hub
Interface, but only one is pending on any PCI/PCI-X interface at a time.
The Intel
bridge that master or target abort. No DWORD cycles cross the bridge that require
completion (i.e., I/O cycles). Therefore, the Intel
Bridge Error” completion message for the memory read commands as shown in
Table
The Intel
completion receives consideration for running on PCI. When there are multiple
completions waiting to use PCI, the Intel
upon its MLT value, even when no other agents are requesting on the bus. Therefore,
the Intel
another transaction.
When any particular transaction runs out of data, and there are other active
transactions to run, the Intel
MLT has not expired for that transaction.
Finally, the prefetch algorithm is altered such that several transactions may be active at
one time.
Byte Count Modified (BCM)
Split Completion Error (SCE)
Split Completion Message
(SCM)
Index
00h
01h
624.
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6300ESB ICH Implementation Completer Attribute Fields
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®
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Master-Abort: The Intel
destination bus.
Target-Abort: The Intel
bus.
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Attribute
6300ESB ICH ends one transaction when its MLT expires, reload, and start
6300ESB ICH asserts DEVSEL# and discards the data when the Requester
6300ESB ICH may only generate error messages for cycles that cross the
6300ESB ICH arbitrates among all active split completions so that each
®
This bit is used for diagnostic purposes. The Intel
never sets this bit.
The Intel
command from PCI-X master or target aborted on the Hub
Interface.
This bit shadows the SCE bit.
6300ESB ICH switches to the next agent, even when the
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6300ESB ICH encountered a Target-Abort on the destination
6300ESB ICH encountered a Master-Abort on the
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6300ESB ICH is only set this bit when a memory read
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6300ESB ICH internally arbitrates based
Message
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6300ESB ICH generates a “PCI-X
Function
Intel
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6300ESB I/O Controller Hub
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6300ESB ICH
693
DS