NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 531

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

12—Intel
12.1.9
12.1.10 Offset 2Ch - 2Dh: SVID—Subsystem Vendor ID
November 2007
Order Number: 300641-004US
31:1
15:5
15:0
Bits
Bits
Default Value:
Default Value:
4:1
6
0
Table 433. Offset 20 - 23h: SMB_BASE—SMBUS Base Address Register
Table 434. Offset 2Ch - 2Dh: SVID—Subsystem Vendor ID (SMBUS—D31:F2/
Lockable:
Device:
Device:
®
Offset:
Offset:
Subsystem Vendor ID
6300ESB ICH
IO Space Indicator
Base Address
Offset 20 - 23h: SMB_BASE—SMBUS Base Address
Register (SMBUS—D31:F3)
(SMBUS—D31:F3)
(SMBUS—D31:F2/F4)
F4)
Reserved
Reserved
(SVID)
31
20-23h
00000001h
Name
31
2Ch-2Dh
0000h
No
Name
Reserved.
Provides the 32-byte system I/O base address for the Intel
6300ESB ICH SMB logic.
Reserved.
This read-only bit is always ‘1’, indicating that the SMB logic is
I/O mapped.
The SVID register, in combination with the Subsystem ID
(SID) register, enables the operating system (OS) to
distinguish subsystems from each other. The value returned
by reads from this register is the same as that which was
written by BIOS into the IDE_SVID register.
Power Well:
Description
Description
Attribute:
Attribute:
Function:
Function:
Size:
Size:
3
Read/Write
32-bit
3
Read-Only
16-bit
Core
Intel
®
6300ESB I/O Controller Hub
®
Access
Access
R/W
RO
RO
RO
RO
531
DS