NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 650

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

18.4
Figure 30. Intel
Table 582. Configuration Addressing
18.4.1
18.4.2
Intel
DS
650
®
6300ESB I/O Controller Hub
Configuration Addressing
Figure 30
As seen in
does not have a space visible to software.
Configuration cycles on the Hub Interface have the same address format, with the bus
number, device number, function number and register number present in the address.
Refer to the Hub Interface specification for details of the address.
Type 0 Accesses to the Intel
The configuration space of the bridge in the Intel
0 configuration transaction on the Hub Interface. The bridge configuration space (the
Intel
conditions are met by the Hub Interface address:
Type 1 to Type 0 Translation
The Intel
transaction is generated on the Hub Interface and is intended for a device attached
directly to the secondary bus. The Intel
command to a Type 0 format so that the secondary bus device may respond to it. This
•
•
•
PCI/PCI-XBus
The bus command is a configuration read or configuration write transaction.
Low 2 address bits AD[1:0] must be 00b.
The device number matches one of the Intel
Function
®
®
6300ESB ICH) responds to a Type 0 configuration transaction when the following
6300ESB I/O Controller Hub Appearance to Software
®
shows how the Intel
Figure
6300ESB ICH performs a Type 1 to Type 0 translation when the Type 1
30, the SM Bus controller does not appear to software. This function
Hub Interface
ID
6
®
6300ESB ICH appears to configuration software.
PCI-X Bus
Interface)
(Hub
®
0
6300ESB ICH must convert the configuration
®
®
®
PCI-X
28 h
6300ESB ICH devices (28).
Dev
6300ESB ICH is accessed by a Type
6300ESB ICH
PCI-X
Func
0
Order Number: 300641-004US
Intel
®
6300ESB ICH—18
November 2007