NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 581
NHE6300ESB S L7XJ
Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet
1.NHE6300ESB_S_L7XJ.pdf
(848 pages)
Specifications of NHE6300ESB S L7XJ
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Compliant
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14—Intel
AC’97 Modem Controller Registers
(D31:F6)
14.1
Table 496. PCI Configuration Map (Modem—D31:F6)
November 2007
Order Number: 300641-004US
Note: Registers that are not shown should be treated as Reserved.
Note: Internal reset as a result of D3
®
6300ESB ICH
AC’97 Modem PCI Configuration Space
(D31:F6)
except the following BIOS programmed registers as BIOS may not be invoked following
the D3-to-D0 transition. Resume well registers will not be reset by the D3
transition.
Core Well registers not reset by the D3
NOTES:
•
•
1. Refer to the Intel
2C-2Dh
00-01h
02-03h
04-05h
06-07h
10-13h
14-17h
50-51h
52-53h
54-55h
2E-2Fh
Offset
value of the Revision ID Register.
3Dh
Offset 2Ch-2Dh – Subsystem Vendor ID (SVID)
Offset 2Eh-2Fh – Subsystem ID (SID)
08h
09h
0Ah
0Bh
0Eh
34h
3Ch
Mnemonic
CAP_PTR
INTR_LN
PCICMD
MMBAR
INT_PN
PCISTA
MBAR
HEDT
SVID
DID
SCC
BCC
PCS
VID
RID
SID
PID
PC
PI
®
6300ESB I/O Controller Hub Specification Update for the most up-to-date
Vendor Identification
Device Identification
PCI Command
PCI Device Status
Revision Identification
Programming Interface
Sub Class Code
Base Class Code
Header Type
Modem Mixer Base Address
Modem Base Address
Subsystem Vendor ID
Subsystem ID
Capabilities Pointer
Interrupt Line
Interrupt Pin
PCI Power Management ID
PC - Power Management Capabilities
Power Management Control and Status
HOT
to D0 transition will reset all the core well registers
Register
HOT
to D0 transition:
Intel
See
®
00000001
00000001
Default
6300ESB I/O Controller Hub
C9C2h
8086h
25A7h
0000h
0290h
0000h
0000h
0001h
0000h
00h
03h
07h
00h
50h
00h
02h
Note 1
h
h
HOT
Write-Once
Write-Once
Access
to D0
R/WC
14
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
581
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