NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 727

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NHE6300ESB S L7XJ

Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet

Specifications of NHE6300ESB S L7XJ

Lead Free Status / RoHS Status
Compliant
19—Intel
19.7.1.2 SIU_SERIRQ Data Frame
Table 654. SIU_SERIRQ Sampling Periods
19.7.1.3 Stop Cycle Control
November 2007
Order Number: 300641-004US
®
6300ESB ICH
Once a Start Frame has been initiated, the SIU will watch for the rising edge of the
Start Pulse and start counting IRQ/Data Frames from there. Each IRQ/Data Frame is
three clocks: Sample phase, Recovery phase, and Turn-around phase. During the
Sample phase the SIU drives the SIU_SERIRQ low, if and only if, its last detected IRQ/
Data value was low. If its detected IRQ/Data value is high, SIU_SERIRQ is left tri-
stated. During the Recovery phase the SIU drives the SIU_SERIRQ high, if and only if,
it had driven the SIU_SERIRQ low during the previous Sample Phase. During the Turn-
around Phase the SIU tri-states the SIU_SERIRQ. The SIU will drive the SIU_SERIRQ
line low at the appropriate sample point if its associated IRQ/Data line is low,
regardless of which device initiated the Start Frame.
The Sample Phase for each IRQ/Data follows the low to high transition of the Start
Frame pulse by a number of clocks equal to the IRQ/Data Frame times three, minus
one. (e.g., The IRQ5 Sample clock is the sixth IRQ/Data Frame, (6 x 3) - 1 = 17th clock
after the rising edge of the Start Pulse).
SIU_SERIRQ Period 13 is used to transfer IRQ12.
Once all IRQ/Data Frames have completed the Host Controller will terminate
SIU_SERIRQ activity by initiating a Stop Frame. Only the Host Controller may initiate
the Stop Frame. A Stop Frame is indicated when the SIU_SERIRQ is low for two or
three clocks. If the Stop Frame’s low time is two clocks, the next SIU_SERIRQ Cycle’s
sampled mode is the Quiet mode; and any SIU_SERIRQ device may initiate a Start
Frame in the second clock or more after the rising edge of the Stop Frame’s pulse. If
the Stop Frame’s low time is three clocks, the next SIU_SERIRQ Cycle’s sampled mode
is the Continuous mode; and only the Host Controller may initiate a Start Frame in the
second clock or more after the rising edge of the Stop Frame’s pulse.
SIU_SERIRQ PERIOD
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
SIGNAL SAMPLED
Not Used
IRQ10
IRQ11
IRQ12
IRQ13
IRQ14
IRQ15
IRQ1
IRQ2
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
IRQ8
IRQ9
# OF CLOCKS PAST START
Intel
®
6300ESB I/O Controller Hub
11
14
17
20
23
26
29
32
35
38
41
44
47
2
5
8
727
DS

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