NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 338
NHE6300ESB S L7XJ
Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet
1.NHE6300ESB_S_L7XJ.pdf
(848 pages)
Specifications of NHE6300ESB S L7XJ
Lead Free Status / RoHS Status
Compliant
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Table 211. Offset E6h - E7h: LPC_EN—LPC I/F Enables (LPC I/F—D31:F0) (Sheet
Intel
DS
338
Bits
Default Value:
4
3
2
1
0
®
6300ESB I/O Controller Hub
Lockable:
Device:
Offset:
COMB_LPC_EN
COMA_LPC_EN
SB16_LPC_EN
FDD_LPC_EN
LPT_LPC_EN
2 of 2)
31
E6h - E7h
0000h
Yes
Name
0 = Disable.
1 = Enables the decoding of the SB16 range to the LPC
NOTE: This bit is no longer supported and will not be
0 = Disable.
1 = Enables the decoding of the FDD range to the LPC
0 = Disable.
1 = Enables the decoding of the LPTrange to the LPC
0 = Disable.
1 = Enables the decoding of the COMB range to the LPC
0 = Disable.
1 = Enables the decoding of the COMA range to the LPC
interface. This range is selected in the LPC_Sound
Decode Range Register.
interface. This range is selected in the LPC_FDD/LPT
Decode Range Register.
interface. This range is selected in the LPC_FDD/LPT
Decode Range Register.
interface. This range is selected in the LPC_COM Decode
Range Register.
interface. This range is selected in the LPC_COM Decode
Range Register.
validated.
Power Well:
Description
Attribute:
Function:
Size:
0
Read/Write
16-bit
Core
Order Number: 300641-004US
Intel
®
6300ESB ICH—8
November 2007
Access
R/W
R/W
R/W
R/W
R/W
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