NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 529

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

12—Intel
12.1.4
12.1.5
November 2007
Order Number: 300641-004US
10:9
Bits
Bits
Default Value:
Default Value:
4:0
7:0
15
14
13
12
11
8
7
6
5
Table 428. Offset 06 - 07h: STA—Device Status Register (SMBUS—D31:F3)
Table 429. Offset 08h: RID—Revision ID Register (SMBUS—D31:F3)
Device:
Device:
®
DEVSEL# Timing Status
User Definable Features
Offset:
Offset:
Signaled System Error
Received Master Abort
Received Target Abort
Signaled Target-Abort
Detected Parity Error
6300ESB ICH
Fast Back-to-Back
Revision ID Value
Data Parity Error
66 MHz Capable
Offset 06 - 07h: STA—Device Status Register
(SMBUS—D31:F3)
Offset 08h: RID—Revision ID Register (SMBUS—
D31:F3)
Reserved
Detected
Capable
(DEVT)
31
06-07h
0280h
Name
(RMA)
Status
31
08h
See bit description
Name
(UDF)
(DPE)
(SSE)
(RTA)
Reserved as ‘0’.
Reserved as ‘0’.
Reserved as ‘0’.
Reserved as ‘0’.
Reserved as ‘0’.
Reserved as ‘0’.
Reserved as ‘0’.
Reserved as ‘0’.
Reserved as ‘0’.
Reserved as ‘0’.
Reserved.
Refer to the Intel
Update for the most up-to-date value of the Revision ID
Register.
®
6300ESB I/O Controller Hub Specification
Description
Description
Attribute:
Attribute:
Function:
Function:
Size:
Size:
3
Read-Only, Read/Write Clear
16-bit
3
Read-Only
8-bit
Intel
®
6300ESB I/O Controller Hub
Access
Access
R/WC
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
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