NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 665

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

18—Intel
18.6.1.15Offset 24: PMBL—Prefetchable Memory Base and Limit
Table 598. Offset 24: PMBL—Prefetchable Memory Base and Limit
18.6.1.16Offset 28: PMBU32—Prefetchable Memory Base Upper 32
November 2007
Order Number: 300641-004US
31:2
19:1
15:0
03:0
31:0
Bits
Bits
0
6
4
0
0
Table 599. Offset 28: PMBU32—Prefetchable Memory Base Upper 32 Bits
Note: Defines the base and limit, aligned to a 1 Mbyte boundary, of the prefetchable memory
Note: Accesses from PCI-X that are outside the ranges specified are forwarded to the Hub
Note: This defines the upper 32 bits of the prefetchable address base register.
Prefetchabl
Limit (PML)
Prefetchabl
Base (PMB)
Prefetchabl
Base Upper
®
Device
Device
e Memory
e Memory
e Memory
Offset
Indicator
Indicator
Offset
(IS64B)
(IS64L)
(PMBU)
6300ESB ICH
Portion
Name
Name
64-bit
64-bit
area of the bridge. Accesses from the Hub Interface that are within the ranges specified
in this register are sent to PCI-X when the memory space enable bit is set.
Interface when the bus master enable bit is set.
Bits
28
24
28
28
These bits are compared with bits 31:20 of the incoming
address to determine the upper 1 Mbyte aligned value
(exclusive) of the range. The incoming address must be less
than this value.
Indicates that 32-bit addressing is supported for the limit.
This value must be in agreement with the IS64B field.
These bits are compared with bits 31:20 of the incoming
address to determine the lower 1 Mbyte aligned value
(inclusive) of the range. The incoming address must be
greater than or equal to this value.
Indicates that 32-bit addressing is supported for the limit.
This value must be in agreement with the IS64L field.
All bits are read/writable.
This register should always be programmed to 00000000h
since the Intel
downstream addressing and 64-bit upstream addressing
®
6300ESB ICH only supports 32-bit
Description
Description
Attribute:
Attribute:
Function
Function
Size:
Size:
0
Read/Write
32-bit
0
Read/Write
32-bit
Intel
00000000h
®
Reset
Value
Reset
Value
000h
000h
6300ESB I/O Controller Hub
1h
1h
Access
Access
R/W
R/W
R/W
RO
RO
665
DS