NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 264

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

5.20.2.3 Output Slot 1: Command Address Port
5.20.2.4 Output Slot 2: Command Data Port
5.20.2.5 Output Slot 3: PCM Playback Left Channel
5.20.2.6 Output Slot 4: PCM Playback Right Channel
5.20.2.7 Output Slot 5: Modem Codec
Intel
DS
264
®
6300ESB I/O Controller Hub
The command port is used to control features and monitor status of AC‘97 functions
including, but not limited to, mixer settings and power management.
The control interface architecture supports up to 64 16-bit read/write registers,
addressable on even byte boundaries. Only the even registers (00h, 02h, etc.) are
valid.
Output frame slot 1 communicates control register address, and write/read command
information.
In the case of the multiple codec implementation, accesses to the codecs are
differentiated by the driver using address offsets 00h
address offsets 80h
the tertiary codec. The differentiation on the link, however, is done through the codec
ID bits.
The command data port is used to deliver 16-bit control register write data in the event
that the current command port operation is a write cycle as indicated in slot 1, bit 19.
When the current command port operation is a read, the entire slot time stuffed with
zeros by the Intel
reserved and are stuffed with zeros.
Output frame slot 3 is the composite digital audio left playback stream. Typically this
slot is composed of standard PCM (.wav) output samples digitally mixed by the host
processor. The Intel
stuffs remaining bits with zeros.
Data in output slots 3 and 4 from the Intel
software when there is only a single channel out.
Output frame slot 4 is the composite digital audio right playback stream. Typically this
slot is composed of standard PCM (.wav) output samples digitally mixed by the host
processor. The Intel
stuffs remaining bits with zeros.
Data in output slots 3 and 4 from the Intel
software when there is only a single channel out.
Output frame slot 5 contains modem DAC data.
The modem DAC output supports 16-bit resolution. At boot time, when the modem
codec is supported, the AC’97 controller driver determines the DAC resolution. During
normal runtime operation the Intel
this time slot with zeros.
®
–
®
®
6300ESB ICH. Bits [19:4] contain the write data. Bits [3:0] are
FEh for the secondary codec, and address offsets 100h
6300ESB ICH transmits sample streams of 16 bits or 20 bits and
6300ESB ICH transmits sample streams of 16 or 20 bits and
®
6300ESB ICH stuffs trailing bit positions within
®
®
6300ESB ICH should be duplicated by
6300ESB ICH should be duplicated by
–
7Fh for the primary codec,
Order Number: 300641-004US
Intel
®
6300ESB ICH—5
November 2007
–
17Fh for