NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 8

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

Contents
1
2
3
4
5
Intel
DS
8
®
6300ESB I/O Controller Hub
Introduction ............................................................................................................49
1.1
Signal Description....................................................................................................55
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
3.10
3.11
3.12
3.13
3.14
3.15
3.16
3.17
3.18
3.19
3.20
3.21
3.22
Intel
4.1
4.2
4.3
4.4
4.5
Functional Description .............................................................................................91
5.1
5.2
Intel
®
®
About This Document .........................................................................................49
Hub Interface to Host Controller ..........................................................................55
Firmware Hub Interface ......................................................................................56
PCI Interface.....................................................................................................57
PCI-X Interface .................................................................................................60
SATA Interface ..................................................................................................64
IDE Interface ....................................................................................................64
LPC I/F.............................................................................................................66
Interrupt Interface .............................................................................................66
USB Interface....................................................................................................67
Power Management Interface ..............................................................................68
CPU Interface....................................................................................................69
SMBus Interface ................................................................................................71
System Management Interface ............................................................................71
Real Time Clock Interface ...................................................................................71
Other Clocks .....................................................................................................72
Miscellaneous Signals .........................................................................................72
AC’97 Link ........................................................................................................73
Universal Asynchronous Receive and Transmit (UART0,1) .......................................73
General Purpose I/O...........................................................................................74
Power and Ground .............................................................................................76
Pin Straps.........................................................................................................77
3.21.1 Functional Straps....................................................................................77
Revision and Device ID Table ..............................................................................78
Power Planes.....................................................................................................79
Integrated Pull-Ups and Pull-Downs......................................................................80
IDE Integrated Series Termination Resistors..........................................................81
Output and I/O Signals Planes and States .............................................................81
Power Planes for Input Signals ............................................................................83
Hub Interface to PCI Bridge (D30:F0) ...................................................................91
5.1.1
5.1.2
5.1.3
5.1.4
5.1.5
5.1.6
5.1.7
LPC Bridge (with System and Management Functions) (D31:F0)...............................97
5.2.1
6300ESB ICH Power Planes and Pin States ....................................................79
6300ESB ICH and System Clock Domains .....................................................53
PCI Bus Interface....................................................................................91
PCI-to-PCI Bridge Model ..........................................................................92
IDSEL to Device Number Mapping .............................................................92
SERR# Functionality................................................................................92
Parity Error Detection..............................................................................95
Standard PCI Bus Configuration Mechanism................................................96
5.1.6.1
5.1.6.2
PCI Dual Address Cycle (DAC) Support ......................................................97
LPC Cycle Types .....................................................................................98
5.2.1.1
5.2.1.2
5.2.1.3
5.2.1.4
Type 0 to Type 0 Forwarding ......................................................96
Type 1 to Type 0 Conversion.......................................................96
Start Field Definition ..................................................................98
Cycle Type/Direction (CYCTYPE + DIR).........................................99
SIZE........................................................................................99
SYNC .......................................................................................99
Intel
Order Number: 300641-004US
®
6300ESB ICH—Contents
November 2007