NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 507

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

11—Intel
11.2.1.4 Offset 08 - 0Bh: HCCPARAMS—Host Controller Capability
Table 411. Offset 08 - 0Bh: HCCPARAMS—Host Controller Capability Parameters
November 2007
Order Number: 300641-004US
31:1
15:8
Bits
Default Value:
7:4
6
3
2
1
0
Device:
®
EHCI Extended Capabil-
Isochronous Scheduling
Offset:
Asynchronous Schedule
Programmable Frame
6300ESB ICH
ities Pointer (EECP)
64-bit Addressing
Park Capability
Parameters
Threshold
Capability
Reserved
Reserved
List Flag
29
08-0Bh
00006871h
Name
Reserved.
This field is hardwired to 68h, indicating that the EHCI
capabilities list exists and begins at offset 68h in the PCI
configuration space.
This field indicates, relative to the current position of the
executing host controller, where software may reliably update
the isochronous schedule. When bit [7] is ’0’, the value of the
least significant 3 bits indicates the number of micro-frames a
host controller holds a set of isochronous data structures (one
or more) before flushing the state. When bit [7] is a ’1’, then
host software assumes the host controller may cache an
isochronous data structure for an entire frame. Refer to the
EHCI specification for details on how software uses this
information for scheduling isochronous transfers.
This field is hardwired to 7h.
Reserved. These bits are reserved and should be set to ’0’.
This bit is hardwired to 0, indicating that the Host Controller
does not support this optional feature.
0 = System software must use a frame list length of 1024
1 = System software may specify and use a smaller frame list
This field documents the addressing range capability of this
implementation. The value of this field determines whether
software should use the 32-bit or 64-bit data structures.
Values for this field have the following interpretation:
0 = Data structures using 32-bit address memory pointers
1 = Data structures using 64-bit address memory pointers
This bit is hardwired to 1.
elements with this host controller. The USBCMD register
Frame List Size field is a read-only register and must be
set to ’0’.
and configure the host controller through the USBCMD
register Frame List Size field. The frame list must always
be aligned on a 4K page boundary. This requirement
ensures that the frame list is always physically
contiguous.
Description
Attribute:
Function:
Size:
7
Read-Only
32-bit
Intel
®
6300ESB I/O Controller Hub
Access
RO
RO
RO
RO
507
DS