NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 204

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

5.17.3.3 Command Register, Status Register, and TD Status Bit
Table 94.
5.17.3.4 Transfer Queuing
Intel
DS
204
®
6300ESB I/O Controller Hub
Interaction
Command Register, Status Register and TD Status Bit Interaction
Note that when a NAK or STALL response is received from a SETUP transaction, a Time-
Out Error will be reported. This will cause the Error counter to decrement and the CRC/
Time-Out Error status bit to be set within the TD Control and Status DWORD during
write back. When the Error counter changes from 1 to 0, the Active bit will be reset to
0 and Stalled bit to 1 as normal.
Transfer Queues are used to implement an ensured data delivery stream to a USB
Endpoint. Transfer Queues are composed of two parts: a Queue Header (QH) and a
linked list. The linked list of TDs and QHs has an indeterminate length (0 to n).
CRC/time-out error
Illegal PID, PID
Error,
Max Length
(illegal)
PCI Master/Target
Abort
Suspend Mode
Resume Received
and
Suspend Mode = 1
Run/Stop = 0
Config Flag Set
HC Reset/Global
Reset
IOC = 1 in TD
Status
Stall
Bit Stuff/Data
Buffer Error
Short Packet
Detect
NOTES:
1. Only when error counter counted down from 1 to 0.
2. Suspend mode may be entered only when Run/Stop bit is 0.
Condition
Set USB Error Int bit
Clear Run/Stop bit in command register
Set HC Process Error and HC Halted bits
Clear Run/Stop bit in command register
Set Host System Error and HC Halted bits
Clear Run/Stop bit in command register
Set HC Halted bit
Set Resume received bit
Clear Run/Stop bit in command register
Set HC Halted bit
Set Config Flag in command register
Clear Run/Stop and Config Flag in command
register
Clear USB Int, USB Error Int, Resume
received, Host System Error, HC Process Error,
and HC Halted bits
Set USB Int bit
Set USB Error Int bit
Set USB Error Int bit
Set USB Int bit
Intel
®
6300ESB ICH USB Status Register
Actions
1
1
, Clear HC Halted bit
.
2
Clear Active bit
Stall bit
Clear Active bit
Stall bit.
Clear Active bit
Stall bit
Clear Active bit
Order Number: 300641-004US
TD Status Register
Intel
1
1
.
.
Actions
®
6300ESB ICH—5
November 2007
1
1
1
and set
and set
and set