NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 548

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

12.2.18 Offset 16h: NOTIFY_DLOW—Notify Data Low Byte
12.2.19 Offset 17h: NOTIFY_DHIGH—Notify Data High
Intel
DS
548
Bits
Bits
Default Value:
Default Value:
7:0
7:0
®
Table 457. Offset 16h: NOTIFY_DLOW—Notify Data Low Byte Register
Table 458. Offset 17h: NOTIFY_DHIGH—Notify Data High Byte Register
6300ESB I/O Controller Hub
Note: This register is in the resume well and is reset by RSMRST#.
Note: This register is in the resume well and is reset by RSMRST#.
Device:
Device:
Offset:
Offset:
DATA_HIGH_BYTE
DATA_LOW_BYTE
Register
Byte Register
31
16h
00h
Name
31
17h
00h
Name
This field contains the first (low) byte of data received during
the Host Notify protocol of the SMBus 2.0 specification.
Software should only consider this field valid when the
HOST_NOTIFY_STS bit is set to ‘1’.
This field contains the second (high) byte of data received
during the Host Notify protocol of the SMBus 2.0
specification. Software should only consider this field valid
when the HOST_NOTIFY_STS bit is set to ‘1’.
Description
Description
Attribute:
Attribute:
Function:
Function:
Size:
Size:
3
Read-Only
8-bit
3
Read-Only
8-bit
Order Number: 300641-004US
Intel
®
6300ESB ICH—12
November 2007
Access
Access
RO
RO