NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 698
NHE6300ESB S L7XJ
Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet
1.NHE6300ESB_S_L7XJ.pdf
(848 pages)
Specifications of NHE6300ESB S L7XJ
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18.9.4
Table 629. Terminations of Completion Required Cycles to Hub Interface
18.10 Delayed/Split Transactions
18.10.1 Number Supported
Intel
DS
698
®
6300ESB I/O Controller Hub
Behavior of PCI/PCI-X Initiated Cycles to Hub
Interface
When in PCI mode, transactions follow the delayed transaction model of PCI 2.2. When
in PCI-X mode, transactions follow the split transaction model of PCI-X. For each
bridge, the Intel
and one delayed/split transaction outbound.
The Hub Interface may take four outbound delayed/split transactions, but only
launches one at a time to each PCI-X interface. Each PCI interface may take eight
delayed/split transactions, but only launches four of those transactions onto the Hub
Interface.
The outbound delayed/split transactions does not prefetch from PCI devices, regardless
of whether the transaction falls in the prefetchable window or the non-prefetchable
window. When in PCI mode, the inbound delayed/split transactions prefetch for all
command types. The “memory read” command may optionally have its prefetch turned
off as specified in the PCI bridge specification. When in PCI-X mode, the inbound
delayed/split transactions do not prefetch – they acquire only the byte count from the
request.
Successful
Master Abort (PCI)
Master Abort (PCI-X)
Target Abort
Master and Target Abort
NOTES:
Hub Interface Termination
1. The Intel
2. The Intel
Hub Interface before the initial connect by PCI or when the PCI master reconnects after a
previous disconnect. When the Intel
the middle of a read completion stream it does not interrupt the stream to signal Target
Abort.
Target Abort for the remaining completion sequence when an abort is detected on the Hub
Interface. When several bytes of data returned successfully from the Hub Interface and have
not yet been sent back on PCI-X, when the abort is detected on the Hub Interface the Intel
6300ESB ICH stops the current sequence for that data (if it was running) and generates the
Split Completion Error Message.
®
®
6300ESB ICH issues a Split Completion Error Message with either Master Abort or
6300ESB ICH only signals Target Abort when the error has been logged from the
®
6300ESB ICH supports eight delayed / split transactions inbound,
Successful
Target Abort
Split Master Abort
Target Abort (PCI)
Split Target Abort (PCI-X)
Target Abort (PCI)
Split Target Abort (PCI-X)
PCI Completion
®
6300ESB ICH receives an abort on the Hub Interface in
1
2
1
1
2
2
None
Received Master Abort (Pri)
Signaled Target Abort (Sec)
Received Master Abort (Pri)
Received Target Abort (Pri)
Signaled Target Abort (Sec)
Received Master Abort (Pri)
Received Target Abort (Pri)
Signaled Target Abort (Sec)
Status Register Bits Set
Order Number: 300641-004US
Intel
®
6300ESB ICH—18
November 2007
®
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