NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 445
NHE6300ESB S L7XJ
Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet
1.NHE6300ESB_S_L7XJ.pdf
(848 pages)
Specifications of NHE6300ESB S L7XJ
Lead Free Status / RoHS Status
Compliant
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9—Intel
9.1.16
November 2007
Order Number: 300641-004US
15:0
Bits
Default Value:
Table 338. Offset 2Ch - 2Dh: IDE_SVID—Subsystem Vendor ID (IDE—D31:F1)
Lockable:
®
Device:
Offset:
6300ESB ICH
Subsystem Vendor ID
Offset 2Ch - 2Dh: IDE_SVID—Subsystem Vendor
ID
(IDE—D31:F1)
(SVID)
31
2Ch-2Dh
0000h
No
Name
The SVID register, in combination with the Subsystem ID
(SID) register, enables the operating system (OS) to
distinguish subsystems from each other. Software (BIOS)
sets the value in this register. After that, the value may be
read, but subsequent writes to this register have no effect.
The value written to this register will also be readable through
the corresponding SVID registers for the USB UHCI #1, USB
UHCI #2, and SMBus functions.
NOTE: Write accesses to the SVID register should only be
done as 16-bit accesses. If two 8-bit write accesses
are done, then the value in the register will not be
correct.
Power Well:
Description
Attribute:
Function:
Size:
1
Read/Write Once
16-bit
Core
Intel
®
6300ESB I/O Controller Hub
R/Write-Once
Access
445
DS
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