NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 640

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

17.2
17.2.1
Table 572. APIC1 Direct Registers
Table 573. APIC Indirect Registers
17.2.2
Intel
DS
640
®
6300ESB I/O Controller Hub
Note: The Index Register will select which APIC indirect register to be manipulated by
Advanced Interrupt Controller (APIC)
There are two APICs in the Intel® 6300ESB ICH: APIC0 and APIC1 (in device 29,
function 5). APIC0’s direct registers are assigned with base address FEC0xxxxH;
however, no external PCI device may write to these registers. APIC1’s direct registers
are assigned with base address FEC1xxxxH. To support legacy device/ drivers on
external PCI bus used with the Intel ICHx, APIC1 has an alternate base address,
FEC0xxxxH. This means external PCI devices may write to IRQ pin assertion register
(either FEC0_0020H or FEC1_0020H) to generate interrupt from APIC1.
APIC0 also includes an XAPIC_EN config bit. This bit must be set to enable the I/O (x)
APIC extension to the I/O APIC. For APIC1, this extension is always enabled.
APIC1 Direct Register Map
The APIC is accessed through an indirect addressing scheme. Two registers are visible
by software for manipulation of most of the APIC registers. These registers are mapped
into memory space. The registers are shown in
Table 573
Register. When accessing these registers, accesses must be done a DWORD at a time.
For example, software should never access byte 2 from the Data register before
accessing bytes 0 and 1. The hardware will not attempt to recover from a bad
programming model in this case.
IND—Index Register
software. The selector values for the indirect registers are listed in
will program this register to select the desired APIC internal register.
12 - 13
10 -11
Index
FEC1_0000h
FEC1_0010h
FEC1_0020h
FEC1_0040h
04-0F
3E-3F
40-FF
Address
00
01
02
03
lists the registers which may be accessed within the APIC through the Index
ID
Version
Arbitration ID
Boot Configuration
Reserved
Redirection Table 0
Redirection Table 1
Redirection Table 23
Reserved
Index Register
Data Register
IRQ Pin Assertion Register
EOI Register
Register
Register
Table
572.
32 bits
32 bits
32 bits
8 bits
Order Number: 300641-004US
Size
Intel
Table
32 bits
32 bits
32 bits
32 bits
64 bits
64 bits
64 bits
Size
®
6300ESB ICH—17
573. Software
November 2007
Type
R/W
R/W
R/W
R/W
Type
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO