NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 725

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

19—Intel
19.6.2.1 Port 60H Emulation (SCR60)
Table 652. Scratch Pad Register P60 (SCR60)
19.6.2.2 Port 64H Emulation (SCR64)
Table 653. Scratch Pad Register P64 (SCR64)
19.7
19.7.1
Figure 34. Start Frame Timing with Source Sampled a Low Pulse on IRQ1
November 2007
Order Number: 300641-004US
®
6300ESB ICH
This 8-bit read/write register has no effect. It is intended as a scratchpad register for
use by the programmer.
This 8-bit read/write register has no effect. It is intended as a scratchpad register for
use by the programmer.
SERIAL IRQ
The SIU supports the serial interrupt to transmit interrupt information to the host
system. The serial interrupt scheme adheres to the Serial IRQ Specification.
Timing Diagrams For SIU_SERIRQ Cycle
NOTES:
Scratch Pad Register P60
SCR60
read/write
Scratch Pad Register P64
SCR64
read/write
1. H=Host Control; R=Recovery; T=Turn-Around; SL=Slave Control; S=Sample
2. Start Frame pulse may be 4-8 clocks wide depending on the location of the device in the PCI
Number
Number
SIUCLK
SIUSIRQ
Drive Source
bridge hierarchy in a synchronous bridge design.
7:0
7:0
Bit
Bit
Bit Mnemonic
Bit Mnemonic
SP60[7:0]
SP64[7:0]
IRQ
SL
or
H
START
Host Controller
START FRAME
H
Address:
Reset State:
Access:
Function
No effect on SIU functionality
Address:
Reset State:
Access:
Function
No effect on SIU functionality
1
R
T
IRQ0 FRAME IRQ1 FRAME
S
None
R
T
60H
00H
8-bit
64H
00H
8-bit
S
Intel
IRQ1
®
R
6300ESB I/O Controller Hub
T
IRQ2 FRAME
S
None
R
T
725
DS