NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 173

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

5—Intel
November 2007
Order Number: 300641-004US
Warning:It is important that the BIOS clears the SECOND_TO_STS bit, as the
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6300ESB ICH
When a triggering event occurs while a message is already being generated and sent,
the new event may not appear in the current message. If not, then a second message
will be generated, with the SEQ[3:0] field incremented, to report the new event.
The following rules/steps apply when the system is in a G0 state and the policy is for
the Intel
messages (alerts) will interfere with the LAN device driver from working
properly. The alerts reset part of the LAN and would prevent an OS’s device
driver from sending or receiving some messages.
10. After step 8 (reset attempt), when the reset is unsuccessful, then the Intel
1. Upon detecting the lockup the SECOND_TO_STS bit will be set. The Intel
2. When the reboot at step 1 is successful then the BIOS should clear the
3. When the reboot attempt in step 1 is not successful, then the timer will timeout a
4. After step 3 (unsuccessful reboot after third timeout), when the user does a Power
5. After step 4 (power button override after unsuccessful reboot) when the user
6. When step 5 (power button press) is successful in waking the system, the Intel
7. When step 5 (power button press) is unsuccessful in waking the system, the Intel
8. After step 3 (unsuccessful reboot after third timeout), when a reset is attempted
9. After step 8 (reset attempt), when the reset is successful, then the BIOS will be
6300ESB ICH may send up to 1 Event message to the LAN. The Intel
ICH will then attempt to reboot the processor.
SECOND_TO_STS bit. This will prevent any further Heartbeats from being sent. The
BIOS may then perform addition recovery/boot steps.
third time. At this point the system has locked up and was unsuccessful in
rebooting. The Intel
The Intel
32 seconds). The heartbeats will continue until some external intervention occurs
(reset, power failure, etc.).
Button Override, the system will go to an S5 state. The Intel
continue sending the messages every heartbeat period.
presses the Power Button again, the system should wake to an S0 state and the
processor should start executing the BIOS.
6300ESB ICH will continue sending messages every heartbeat period until the BIOS
clears the SECOND_TO_STS bit.
6300ESB ICH will continue sending a message every heartbeat period. The Intel
6300ESB ICH will not attempt to automatically reboot again. The Intel
ICH will start sending a message every heartbeat period (30-32 seconds). The
heartbeats will continue until some external intervention occurs (reset, power
failure, etc.).
(using a button that pulses PWROK low or through the message on the SMBus
slave I/F), the Intel
run. The Intel
period until the BIOS clears the SECOND_TO_STS bit.
6300ESB ICH will continue sending a message every heartbeat period. The Intel
6300ESB ICH will not attempt to reboot the system again without external
intervention.
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6300ESB ICH to reboot the system after a hardware lockup:
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6300ESB ICH will start sending a message every heartbeat period (30-
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6300ESB ICH will continue sending a message every heartbeat
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6300ESB ICH will attempt to reset the system.
6300ESB ICH will not attempt to automatically reboot again.
Intel
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6300ESB I/O Controller Hub
6300ESB ICH will
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6300ESB
6300ESB
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