NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 151

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

5—Intel
Table 66.
Table 67.
November 2007
Order Number: 300641-004US
®
6300ESB ICH
Causes of SMI# (Sheet 2 of 2)
Causes of TCO SMI#
See
causes.
NOTES:
Century Rollover
TCO TIMEROUT
OS writes to TCO_DAT_IN register
Message from MCH
NMI occurred (and NMIs mapped to
SMI)
See NMI section for causes of NMI
NOTE: NMI2SMI_STS is not gated by TCO_EN. See table above.
INTRUDER# signal goes active
Changes of the BIOSWP bit from 0
to 1
Write attempted to BIOS
1. GBL_SMI_EN must be 1 to enable SMI.
2. EOS must be written to 1 to re-enable SMI for the next one.
3. Some SMI#s are considered “synchronous”, in that the processor should recognize the SMI#
4. NMI2SMI_STS is not gated by TCO_EN.
Device Monitors matches an
SMBus Host Notify message
SMBus Slave SMI message
SMBus SMBALERT# signal
prior to completing the instruction (I/O read, I/O write, Memory read, or Memory write) that
should cause the SMI#. This is accomplished by having the SMI# signal go active to the
processor prior to the processor observing the RDY# signal that terminates the cycle. SMI#s
marked with X in the Synch column are treated as Synchronous.Synchronous SMI#s are not
possible in IA64 platforms, since they do not support the SMI# signal.
Access to Microcontroller
SLP_EN bit written to 1
Section 5.12.3, “TCO Theory of Operation”
SMBus Host Controller
address in its range
Range (62h/66h)
WDT 1
received
Cause
active
st
Cause
timeout
Host Controller enabled
HOST_NOTIFY_INTREN
WDT_INT_TYPE = ‘10’
DEV[n]_TRAP_EN = 1
SMI_ON_SLP_EN = 1
Additional Enables
WDT_ENABLE = 1,
None
None
None
None
NMI2SMI_EN = 1
INTRD_SEL = 10
BLD = 1
BIOSWP = 1
SMB_SMI_EN
MCSMI_EN
Additional Enables
None
None
for details on the TCO SMI#
SMI_ON_SLP_EN_S
HOST_NOTIFY_STS
DEV[n]_TRAP_STS
SMBus Host Status
SMBUS_SMI_STS,
Where Reported
Various bits in the
SMBUS_SMI_STS
SMBUS_SMI_STS
WDT_SMI_STS
DEVMON_STS,
Intel
MCSMI_STS
Register
NEWCENTURY_STS
TIMEOUT
OS_TCO_SMI
MCHSMI_STS
NMI2SMI_STS
INTRD_DET
BIOSWR_STS
BIOSWR_STS
®
TS
Where Reported
6300ESB I/O Controller Hub
Synch
X
X
X
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