NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 737

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NHE6300ESB S L7XJ

Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet

Specifications of NHE6300ESB S L7XJ

Lead Free Status / RoHS Status
Compliant
20—Intel
Serial ATA Controller Registers
(D31:F2)
20.1
Table 660. PCI Configuration Map (SATA–D31:F2) (Sheet 1 of 2)
November 2007
Order Number: 300641-004US
NOTES:
2C-2Dh
1. The Intel
2. Refer to the Intel
00-01h
02-03h
04-05h
06-07h
10-13h
14-17h
18-1Bh
20-23h
40-41h
42-43h
1C-1Fh
2E-2Fh
Offset
0Dh
08h
09h
0Ah
0Bh
0Eh
34h
44h
48h
3C
3D
master latency timer.
Revision ID register.
Note: Registers that are not shown should be treated as reserved.
®
6300ESB ICH
®
Mnemonic
SCMD_BAR
SDMA_CNT
PCMD_BAR
SCNL_BAR
PCNL_BAR
IDE_TIMP
IDE_TIMS
INTR_LN
INTR_PN
SIDETIM
6300ESB ICH SATA Controller is not arbitrated as a PCI device, therefore it does not need a
PCI Configuration Registers (SATA–D31:F2)
All of the SATA registers are in the core well. They can never be locked.
HTYPE
SVID
CMD
SCC
BCC
BAR
DID
STS
RID
CAP
VID
MLT
SID
PI
®
6300ESB I/O Controller Hub Specification Update for the most up-to-date value of the
Vendor ID
Device ID
Command Register
Device Status
Revision ID
Programming Interface
Sub Class Code
Base Class Code
Master Latency Timer
Header Type
Primary Command Block Base Address
Primary Control Block Base Address
Secondary Command Block Base Address
Secondary Control Block Base Address
Base Address Register
Subsystem Vendor ID
Subsystem ID
Capabilities Pointer
Interrupt Line
Interrupt Pin
Primary IDE Timing
Secondary IDE Timing
Slave IDE Timing
Synchronous DMA Control Register
Register Name/Function
25A3h or 25B0h
00000001h
00000001h
00000001h
00000001h
00000001h
See
01h or 04h
Default
02B0h
8086h
0000h
0000h
00h
8Ah
01h
00h
00h
00h
00h
80h
00h
01h
00h
00h
Note 2
Intel
®
6300ESB I/O Controller Hub
R/Write-Once
R/Write-Once
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
RO
RO
20
737
DS

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