NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 672

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

Intel
DS
672
07:0
Bits
05
6
®
Table 605. Offset 40: CNF—Intel® 6300ESB I/O Controller Hub Configuration
6300ESB I/O Controller Hub
Restreamin
Device
Frequency
Offset
g Disable
(PFREQ)
(RSDIS)
Name
PCI-X
(Sheet 2 of 3)
28
40
Determines the frequency the PCI-X bus operates. The power
up value of this register is written based upon the following
table:
PCIXCAP=Bit 7M66EN=Bit 6
After software determines the buses’ capabilities, it sets this
value and the PMODE bit (bit 8 of this register) to the desired
frequency and resets the PCI-X bus. The values are encoded
as follows:
Bits Freq (MHz)Notes
0
1
10
11
The default value (S-select value) is determined by the values
of M66EN and PCIXCAP pins as per the table above.
NOTE: This register should not be written to and should be
When this bit is set, this bridge of the Intel
longer performs restreaming. This bit only applies when the
bridge is in PCI mode, and not when the bridge is in PCI-X
mode. When the PCI transaction ends, either due to a PCI
master removing PXFRAME# or the Intel
asserting STOP#, the Intel
the prefetch buffer.
PCIXCAP M66EN
Mid
0
0
1
33
66
not supported
not supported
treated by Software as Read Only. Writes will change
the register value rendering the contents invalid since
the value will not affect the PCI-X Mode.
N/A
N/A
0
1
Only valid when PMODE is 0.
PCI/X
PCI-X
PCI-X
Description
PCI
PCI
®
6300ESB ICH discards all data in
Attribute:
Function
®
33 MHz
66 MHz
66 MHz
66 MHz
®
6300ESB ICH
Size:
Freq
6300ESB ICH no
0
Read/Write
16-bit
Order Number: 300641-004US
Reset
Value
0h
Intel
0
®
6300ESB ICH—18
November 2007
Access
R/W
R/W