CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 981

Manufacturer Part Number

CSM9S12XDT512SLK

KIT STUDENT LEARNING 16BIT

Manufacturer

Freescale Semiconductor

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Memory Map and Register Deﬁnition

This section provides a detailed description of all PIM registers.

shows the register map of the port integration module.

Module Memory Map

Port A Data Register (PORTA)

Port B Data Register (PORTB)

Port A Data Direction Register (DDRA)

Port B Data Direction Register (DDRB)

PIM Reserved

Port E Data Register (PORTE)

Port E Data Direction Register (DDRE)

Non-PIM Address Range

Pull-up Up Control Register (PUCR)

Reduced Drive Register (RDRIV)

Non-PIM Address Range

ECLK Control Register (ECLKCTL)

PIM Reserved

IRQ Control Register (IRQCR)

PIM Reserved

Non-PIM Address Range

Port K Data Register (PORTK)

Port K Data Direction Register (DDRK)

Non-PIM Address Range

Port T Data Register (PTT)

Port T Input Register (PTIT)

Port T Data Direction Register (DDRT)

Port T Reduced Drive Register (RDRT)

Table 24-2. PIM Memory Map (Sheet 1 of 3)

Read / Write