CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 840

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CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
22.3.2.20 Port T Reduced Drive Register (RDRT)
Read: Anytime.
Write: Anytime.
This register configures the drive strength of each port T output pin as either full or reduced. If the port is
used as input this bit is ignored.
22.3.2.21 Port T Pull Device Enable Register (PERT)
Read: Anytime.
Write: Anytime.
This register configures whether a pull-up or a pull-down device is activated, if the port is used as input.
This bit has no effect if the port is used as output. Out of reset no pull device is enabled.
842
RDRT[7:0]
PERT[7:0]
Reset
Reset
Field
Field
7–0
7–0
W
W
R
R
RDRT7
PERT7
Reduced Drive Port T
0 Full drive strength at output.
1 Associated pin drives at about 1/6 of the full drive strength.
Pull Device Enable Port T
0 Pull-up or pull-down device is disabled.
1 Either a pull-up or pull-down device is enabled.
0
0
7
7
RDRT6
PERT6
Figure 22-23. Port T Pull Device Enable Register (PERT)
0
0
6
6
Figure 22-22. Port T Reduced Drive Register (RDRT)
Table 22-24. RDRT Field Descriptions
Table 22-25. PERT Field Descriptions
RDRT5
PERT5
MC9S12XDP512 Data Sheet, Rev. 2.21
0
0
5
5
RDRT4
PERT4
0
0
4
4
Description
Description
RDRT3
PERT3
0
0
3
3
RDRT2
PERT2
0
0
2
2
RDRT1
PERT1
Freescale Semiconductor
0
0
1
1
RDRT0
PERT0
0
0
0
0

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