CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 160

Manufacturer Part Number

CSM9S12XDT512SLK

KIT STUDENT LEARNING 16BIT

Manufacturer

Freescale Semiconductor

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Chapter 5 Analog-to-Digital Converter (S12ATD10B8CV2)

This section lists all inputs to the ATD block.

This pin serves as the analog input channel x. It can also be conﬁgured as general purpose digital port pin

and/or external trigger for the ATD conversion.

These inputs can be conﬁgured to serve as an external trigger for the ATD conversion.

Refer to the device overview chapter for availability and connectivity of these inputs.

These pins are the power supplies for the analog circuitry of the ATD block.

is the high reference voltage and V

Entering stop mode causes all clocks to halt and thus the system is placed in a minimum power

standby mode. This aborts any conversion sequence in progress. During recovery from stop mode,

there must be a minimum delay for the stop recovery time t

conversion sequence.

Entering wait mode the ATD conversion either continues or aborts for low power depending on the

logical value of the AWAIT bit.

In freeze mode the ATD will behave according to the logical values of the FRZ1 and FRZ0 bits.

This is useful for debugging and emulation.

External Signal Description

shows a block diagram of the ATD.

Block Diagram

ANx (x = 7, 6, 5, 4, 3, 2, 1, 0) — Analog Input Pin

ETRIG3, ETRIG2, ETRIG1, and ETRIG0 — External Trigger Pins

MCU Operating Modes

— High and Low Reference Voltage Pins

— Power Supply Pins

MC9S12XDP512 Data Sheet, Rev. 2.21

is the low reference voltage for ATD conversion.

before initiating a new ATD

Freescale Semiconductor