CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 1004

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CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 24 DG128 Port Integration Module (S12XDG128PIMV2)
Write: Anytime.
This register configures whether a pull-up or a pull-down device is activated, if the port is used as input or
as output in wired-OR (open drain) mode. This bit has no effect if the port is used as push-pull output. Out
of reset a pull-up device is enabled.
24.0.5.24 Port S Polarity Select Register (PPSS)
Read: Anytime.
Write: Anytime.
This register selects whether a pull-down or a pull-up device is connected to the pin.
24.0.5.25 Port S Wired-OR Mode Register (WOMS)
Read: Anytime.
Write: Anytime.
1006
PERS[7:0]
PPSS[7:0]
Reset
Reset
Field
Field
7–0
7–0
W
W
R
R
WOMS7
PPSS7
Pull Device Enable Port S
0 Pull-up or pull-down device is disabled.
1 Either a pull-up or pull-down device is enabled.
Pull Select Port S
0 A pull-up device is connected to the associated port S pin, if enabled by the associated bit in register PERS
1 A pull-down device is connected to the associated port S pin, if enabled by the associated bit in register PERS
0
0
7
7
and if the port is used as input or as wired-OR output.
and if the port is used as input.
WOMS6
PPSS6
Figure 24-27. Port S Wired-OR Mode Register (WOMS)
0
0
6
6
Figure 24-26. Port S Polarity Select Register (PPSS)
Table 24-25. PERS Field Descriptions
Table 24-26. PPSS Field Descriptions
WOMS5
PPSS5
MC9S12XDP512 Data Sheet, Rev. 2.21
0
0
5
5
WOMS4
PPSS4
0
0
4
4
Description
Description
WOMS3
PPSS3
0
0
3
3
WOMS2
PPSS2
0
0
2
2
WOMS1
PPSS1
Freescale Semiconductor
0
0
1
1
WOMS0
PPSS0
0
0
0
0

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