CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 931

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CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
RDRT[7:0]
PERT[7:0]
Reset
Reset
This register configures the drive strength of each port T output pin as either full or reduced. If the
port is used as input this bit is ignored.
Field
23.0.5.21 Port T Pull Device Enable Register (PERT)
Read: Anytime.
Write: Anytime.
This register configures whether a pull-up or a pull-down device is activated, if the port is used as
input. This bit has no effect if the port is used as output. Out of reset no pull device is enabled.
Field
23.0.5.22 Port T Polarity Select Register (PPST)
Read: Anytime.
Write: Anytime.
This register selects whether a pull-down or a pull-up device is connected to the pin.
7–0
7–0
W
W
R
R
PERT7
PPST7
Reduced Drive Port T
0 Full drive strength at output.
1 Associated pin drives at about 1/6 of the full drive strength.
Pull Device Enable Port T
0 Pull-up or pull-down device is disabled.
1 Either a pull-up or pull-down device is enabled.
7
0
7
0
PERT6
PPST6
Figure 23-23. Port T Pull Device Enable Register (PERT)
0
0
6
6
Figure 23-24. Port T Polarity Select Register (PPST)
Table 23-24. RDRT Field Descriptions
Table 23-25. PERT Field Descriptions
PERT5
PPST5
5
0
5
0
PERT4
PPST4
0
0
4
4
Description
Description
PERT3
PPST3
3
0
3
0
PERT2
PPST2
0
0
2
2
PERT1
PPST1
1
0
1
0
PERT0
PPST0
0
0
0
0

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