CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 379

• Manufacturer Part Number: CSM9S12XDT512SLK
• Description: KIT STUDENT LEARNING 16BIT
• Manufacturer: Freescale Semiconductor

Specifications of CSM9S12XDT512SLK

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

See
To calculate the output duty cycle (high time as a% of period) for a particular channel:
For boundary case programming values, please refer to
Read: Anytime
Write: Anytime
8.3.2.15
The PWMSDN register provides for the shutdown functionality of the PWM module in the emergency
cases. For proper operation, channel 7 must be driven to the active level for a minimum of two bus clocks.
Read: Anytime
Write: Anytime
Freescale Semiconductor
Reset
Reset
•
•
Section 8.4.2.3, “PWM Period and Duty”
W
W
R
R
Polarity = 0 (PPOL x =0)
Polarity = 1 (PPOLx = 1)
Duty Cycle = [(PWMPERx-PWMDTYx)/PWMPERx] * 100%
Duty Cycle = [PWMDTYx / PWMPERx] * 100%
PWMIF
Bit 7
PWM Shutdown Register (PWMSDN)
1
0
7
7
Reads of this register return the most recent value written. Reads do not
necessarily return the value of the currently active duty due to the double
buffering scheme.
Depending on the polarity bit, the duty registers will contain the count of
either the high time or the low time. If the polarity bit is one, the output starts
high and then goes low when the duty count is reached, so the duty registers
contain a count of the high time. If the polarity bit is zero, the output starts
low and then goes high when the duty count is reached, so the duty registers
contain a count of the low time.
= Unimplemented or Reserved
PWMIE
Figure 8-16. PWM Channel Duty Registers (PWMDTYx)
1
0
6
6
6
Figure 8-17. PWM Shutdown Register (PWMSDN)
PWMRSTRT
MC9S12XDP512 Data Sheet, Rev. 2.21
1
0
0
5
5
5
for more information.
PWMLVL
NOTE
NOTE
1
0
4
4
4
Section 8.4.2.8, “PWM Boundary
1
0
0
3
3
3
Chapter 8 Pulse-Width Modulator (S12PWM8B8CV1)
PWM7IN
1
0
2
2
2
PWM7INL
1
0
1
1
1
Cases”.
PWM7ENA
Bit 0
1
0
0
0
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