CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 68

Manufacturer Part Number

CSM9S12XDT512SLK

KIT STUDENT LEARNING 16BIT

Manufacturer

Freescale Semiconductor

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Chapter 1 Device Overview MC9S12XD-Family

The clock and reset generator module (CRG) provides the internal clock signals for the core and all

peripheral modules.

See 79Chapterf or details on clock generation.

The MCU’s system clock can be supplied in several ways enabling a range of system operating frequencies

to be supported:

The clock generated by the PLL or oscillator provides the main system clock frequencies core clock and

bus clock. As shown in

memories, and the peripherals.

The program Flash memory and the EEPROM are supplied by the bus clock and the oscillator clock.The

oscillator clock is used as a time base to derive the program and erase times for the NVM’s. See the Flash

and EEPROM section for more details on the operation of the NVM’s.

The on-chip phase locked loop (PLL)

the PLL self clocking

the oscillator

System Clock Description

Figure 1-14. MC9S12XD Family Clock Connections

1-12, this system clocks are used throughout the MCU to drive the core, the

shows the clock connections from the CRG to all modules.

MC9S12XDP512 Data Sheet, Rev. 2.21

Oscillator Clock

Freescale Semiconductor