CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 856

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CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
22.3.2.41 Port P Reduced Drive Register (RDRP)
Read: Anytime.
Write: Anytime.
This register configures the drive strength of each port P output pin as either full or reduced. If the port is
used as input this bit is ignored.
22.3.2.42 Port P Pull Device Enable Register (PERP)
Read: Anytime.
Write: Anytime.
This register configures whether a pull-up or a pull-down device is activated, if the port is used as input.
This bit has no effect if the port is used as output. Out of reset no pull device is enabled.
858
RDRP[7:0]
PERP[7:0]
Reset
Reset
Field
Field
7–0
7–0
W
W
R
R
RDRP7
PERP7
Reduced Drive Port P
0 Full drive strength at output.
1 Associated pin drives at about 1/6 of the full drive strength.
Pull Device Enable Port P
0 Pull-up or pull-down device is disabled.
1 Either a pull-up or pull-down device is enabled.
0
0
7
7
RDRP6
PERP6
Figure 22-44. Port P Pull Device Enable Register (PERP)
0
0
6
6
Figure 22-43. Port P Reduced Drive Register (RDRP)
Table 22-40. RDRP Field Descriptions
Table 22-41. PERP Field Descriptions
RDRP5
PERP5
MC9S12XDP512 Data Sheet, Rev. 2.21
0
0
5
5
RDRP4
PERP4
0
0
4
4
Description
Description
RDRP3
PERP3
0
0
3
3
RDRP2
PERP2
0
0
2
2
RDRP1
PERP1
Freescale Semiconductor
0
0
1
1
RDRP0
PERP0
0
0
0
0

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