CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 601

no-image

CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
16.3.1.1
Read: Anytime
Write: Anytime
Freescale Semiconductor
Address: 0x0121
IVB_ADDR[7:0]
Reset
Field
7–0
W
R
Interrupt Vector Base Register (IVBR)
1
7
Interrupt Vector Base Address Bits — These bits represent the upper byte of all vector addresses. Out of
reset these bits are set to 0xFF (i.e., vectors are located at 0xFF10–0xFFFE) to ensure compatibility to
HCS12.
Note: A system reset will initialize the interrupt vector base register with “0xFF” before it is used to determine
Note: If the BDM is active (i.e., the CPU is in the process of executing BDM firmware code), the contents of
the reset vector address. Therefore, changing the IVBR has no effect on the location of the three reset
vectors (0xFFFA–0xFFFE).
IVBR are ignored and the upper byte of the vector address is fixed as “0xFF”.
1
6
Figure 16-3. Interrupt Vector Base Register (IVBR)
Table 16-2. IVBR Field Descriptions
MC9S12XDP512 Data Sheet, Rev. 2.21
1
5
1
4
IVB_ADDR[7:0]
Description
1
3
1
2
Chapter 16 Interrupt (S12XINTV1)
1
1
1
0
601

Related parts for CSM9S12XDT512SLK