CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 281

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CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
SUBH
Operation
RD – IMM8:$00
Subtracts a signed immediate 8 bit constant from the content of high byte of register RD and using binary
subtraction and stores the result in the high byte of destination register RD. This instruction can be used
after an SUBL for a 16 bit immediate subtraction.
Example:
CCR Effects
Code and CPU Cycles
Freescale Semiconductor
N:
Z:
V:
C:
SUBH RD, #IMM8
N
Set if bit 15 of the result is set; cleared otherwise.
Set if the result is $0000; cleared otherwise.
Set if a two´s complement overflow resulted from the operation; cleared otherwise.
RD[15]
Set if there is a carry from the bit 15 of the result; cleared otherwise.
RD[15]
Z
SUBL
SUBH
V
Source Form
old
old
& IMM8[7] & RD[15]
& IMM8[7] | RD[15]
C
R2,#LOWBYTE
R2,#HIGHBYTE
RD
old
Subtract Immediate 8 bit Constant
new
& RD[15]
Address
MC9S12XDP512 Data Sheet, Rev. 2.21
| RD[15]
Mode
IMM8
; R2 = R2 - 16 bit immediate
new
old
(High Byte)
1
& IMM8[7] & RD[15]
| IMM8[7] & RD[15]
1
0
0
1
Machine Code
RD
new
new
Chapter 6 XGATE (S12XGATEV2)
IMM8
SUBH
Cycles
P
281

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