CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 135

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CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4.3.2.4
This register controls the conversion sequence length, FIFO for results registers and behavior in Freeze
Mode. Writes to this register will abort current conversion sequence but will not start a new sequence.
Read: Anytime
Write: Anytime
Freescale Semiconductor
Reset
Field
S8C
S4C
S2C
S1C
W
6
5
4
3
R
ATD Control Register 3 (ATDCTL3)
0
0
7
Conversion Sequence Length — This bit controls the number of conversions per sequence.
all combinations. At reset, S4C is set to 1 (sequence length is 4). This is to maintain software continuity to HC12
Family.
Conversion Sequence Length — This bit controls the number of conversions per sequence.
all combinations. At reset, S4C is set to 1 (sequence length is 4). This is to maintain software continuity to HC12
Family.
Conversion Sequence Length — This bit controls the number of conversions per sequence.
all combinations. At reset, S4C is set to 1 (sequence length is 4). This is to maintain software continuity to HC12
Family.
Conversion Sequence Length — This bit controls the number of conversions per sequence.
all combinations. At reset, S4C is set to 1 (sequence length is 4). This is to maintain software continuity to HC12
Family.
= Unimplemented or Reserved
S8C
0
6
Figure 4-6. ATD Control Register 3 (ATDCTL3)
Table 4-8. ATDCTL3 Field Descriptions
MC9S12XDP512 Data Sheet, Rev. 2.21
S4C
1
5
Chapter 4 Analog-to-Digital Converter (ATD10B16CV4) Block Description
S2C
0
4
Description
S1C
0
3
FIFO
0
2
FRZ1
0
1
Table 4-9
Table 4-9
Table 4-9
Table 4-9
FRZ0
0
0
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