CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 1272

• Manufacturer Part Number: CSM9S12XDT512SLK
• Description: KIT STUDENT LEARNING 16BIT
• Manufacturer: Freescale Semiconductor

Specifications of CSM9S12XDT512SLK

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Appendix A Electrical Characteristics
A.7
This section provides electrical parametrics and ratings for the SPI. In
conditions are listed.
1
A.7.1
In
In
1274
Drive mode
Load capacitance C
Thresholds for delay measurement points
Timing specified for equal load on all SPI output pins. Avoid asymmetric load.
Figure A-6
Figure A-7
(CPOL = 1)
(CPOL = 0)
(Output)
(Output)
(Output)
(Output)
1. If configured as an output.
2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB.
(Input)
MISO
MOSI
SCK
SCK
SS1
SPI Timing
Master Mode
the timing diagram for master mode with transmission format CPHA = 0 is depicted.
the timing diagram for master mode with transmission format CPHA=1 is depicted.
LOAD
1
,
on all outputs
2
5
10
MSB IN2
MSB OUT2
Description
6
Figure A-6. SPI Master Timing (CPHA = 0)
4
Table A-25. Measurement Conditions
MC9S12XDP512 Data Sheet, Rev. 2.21
1
4
Bit 6 . . . 1
Bit 6 . . . 1
9
12
12
LSB IN
LSB OUT
Table A-25
13
13
(20% / 80%) V
Full drive mode
Value
50
11
the measurement
Freescale Semiconductor
3
DDX
Unit
pF
—
V