CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 561

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CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
14.3.2.4
The VREGAPITR register allows to trim the API timeout period.
Freescale Semiconductor
APITR[5:0]
1. Reset value is either 0 or preset by factory. See Device User Guide for details.
Reset
Field
7–2
W
R
APITR5
Autonomous Periodical Interrupt Period Trimming Bits — See
Autonomous Periodical Interrupt Trimming Register (VREGAPITR)
0
Figure 14-5. Autonomous Periodical Interrupt Trimming Register (VREGAPITR)
7
1
= Unimplemented or Reserved
APITR4
APITR[5]
APITR[4]
APITR[3]
APITR[2]
APITR[1]
APITR[0]
0
6
1
Bit
Table 14-5. VREGAPITR Field Descriptions
Table 14-6. Trimming Effect of APIT
Increases period
Decreases period less than APITR[5] increased it
Decreases period less than APITR[4]
Decreases period less than APITR[3]
Decreases period less than APITR[2]
Decreases period less than APITR[1]
APITR3
MC9S12XDP512 Data Sheet, Rev. 2.21
0
5
1
APITR2
0
4
1
Trimming Effect
Description
APITR1
0
3
1
Chapter 14 Voltage Regulator (S12VREG3V3V5)
Table 14-6
APITR0
0
2
1
for trimming effects.
0
0
1
0
0
0
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