CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 506

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CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 11 Serial Communication Interface (S12SCIV5)
In
at RT5 is high. The RT5 sample sets the noise flag. Although this is a worst-case misalignment of perceived
bit time, the data samples RT8, RT9, and RT10 are within the bit time and data recovery is successful.
Figure 11-25
synchronization with the start bit time, it does set the noise flag.
506
Figure
RT Clock Count
Reset RT Clock
RT Clock Count
Reset RT Clock
RT Clock
RT Clock
Samples
Samples
11-24, a large burst of noise is perceived as the beginning of a start bit, although the test sample
RXD
RXD
shows the effect of noise early in the start bit time. Although this noise does not affect proper
1
1
1
1
1
1
1
0
1
Figure 11-24. Start Bit Search Example 3
Figure 11-25. Start Bit Search Example 4
1
0
MC9S12XDP512 Data Sheet, Rev. 2.21
1
1
1
1
Perceived Start Bit
0
0
0
1
0
0
Perceived and Actual Start Bit
0
Actual Start Bit
Freescale Semiconductor
LSB
LSB

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