CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 148

Manufacturer Part Number

CSM9S12XDT512SLK

KIT STUDENT LEARNING 16BIT

Manufacturer

Freescale Semiconductor

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Chapter 4 Analog-to-Digital Converter (ATD10B16CV4) Block Description

Read: Anytime

Write: anytime

Read: Anytime

Write: Anytime

ATD Input Enable Register 0 (ATDDIEN0)

ATD Input Enable Register 1 (ATDDIEN1)

ATD Digital Input Enable on Channel Bits — This bit controls the digital input buffer from the analog input

pin (ANx) to PTADx data register.

0 Disable digital input buffer to PTADx

1 Enable digital input buffer to PTADx.

Note: Setting this bit will enable the corresponding digital input buffer continuously. If this bit is set while

ATD Digital Input Enable on Channel Bits — This bit controls the digital input buffer from the analog input

pin (ANx) to PTADx data register.

0 Disable digital input buffer to PTADx

1 Enable digital input buffer to PTADx.

Note: Setting this bit will enable the corresponding digital input buffer continuously. If this bit is set while

simultaneously using it as an analog port, there is potentially increased power consumption because the

digital input buffer maybe in the linear region.

simultaneously using it as an analog port, there is potentially increased power consumption because the

digital input buffer maybe in the linear region.

Figure 4-14. ATD Input Enable Register 0 (ATDDIEN0)

Figure 4-15. ATD Input Enable Register 1 (ATDDIEN1)

Table 4-23. ATDDIEN0 Field Descriptions

Table 4-24. ATDDIEN1 Field Descriptions

MC9S12XDP512 Data Sheet, Rev. 2.21

Freescale Semiconductor