CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 1054

• Manufacturer Part Number: CSM9S12XDT512SLK
• Description: KIT STUDENT LEARNING 16BIT
• Manufacturer: Freescale Semiconductor

Specifications of CSM9S12XDT512SLK

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 25 2 Kbyte EEPROM Module (S12XEETX2KV1)
25.4.2.1
The erase verify operation will verify that the EEPROM memory is erased.
An example flow to execute the erase verify operation is shown in
write sequence is as follows:
After launching the erase verify command, the CCIF flag in the ESTAT register will set after the operation
has completed unless a new command write sequence has been buffered. The number of bus cycles
required to execute the erase verify operation is equal to the number of words in the EEPROM memory
plus 14 bus cycles as measured from the time the CBEIF flag is cleared until the CCIF flag is set. Upon
completion of the erase verify operation, the BLANK flag in the ESTAT register will be set if all addresses
in the EEPROM memory are verified to be erased. If any address in the EEPROM memory is not erased,
the erase verify operation will terminate and the BLANK flag in the ESTAT register will remain clear.
1056
1. Write to an EEPROM address to start the command write sequence for the erase verify command.
2. Write the erase verify command, 0x05, to the ECMD register.
3. Clear the CBEIF flag in the ESTAT register by writing a 1 to CBEIF to launch the erase verify
The address and data written will be ignored.
command.
Erase Verify Command
MC9S12XDP512 Data Sheet, Rev. 2.21
Figure
25-18. The erase verify command
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