CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 205

Manufacturer Part Number

CSM9S12XDT512SLK

KIT STUDENT LEARNING 16BIT

Manufacturer

Freescale Semiconductor

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Two concurrent threads are running on the system. One is running on the S12X_CPU and the other is

running on the RISC core. They both have a critical section of code that accesses the same system resource.

To guarantee that the system resource is only accessed by one thread at a time, the critical code sequence

must be embedded in a semaphore lock/release sequence as shown.

The XGATE module will immediately terminate program execution after detecting an error condition

caused by erratic application code. There are three error conditions:

All opcodes which are not listed in section

and opcode fetches as well as illegal load and store accesses are deﬁned on chip level. Refer to the

S12X_MMC Section for a detailed information.

Freescale Semiconductor

Execution of an illegal opcode

Illegal vector or opcode fetches

Illegal load or store accesses

Software Error Detection

gives an example of the typical usage of the XGATE hardware semaphores.

Figure 6-22. Algorithm for Locking and Releasing Semaphores

MC9S12XDP512 Data Sheet, Rev. 2.21

Section 6.8, “Instruction Set”

are illegal opcodes. Illegal vector

Chapter 6 XGATE (S12XGATEV2)