CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 505

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CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
In
not the beginning of a start bit. The RT clock is reset and the start bit search begins again. The noise flag
is not set because the noise occurred before the start bit was found.
In
perceived bit time is misaligned, the data samples RT8, RT9, and RT10 are within the bit time and data
recovery is successful.
Freescale Semiconductor
Figure 11-22
Figure
RT Clock Count
Reset RT Clock
RT Clock Count
Reset RT Clock
RT Clock
RT Clock
Samples
Samples
11-23, verification sample at RT3 is high. The RT3 sample sets the noise flag. Although the
RXD
RXD
the verification samples RT3 and RT5 determine that the first low detected was noise and
1
1
1
1
1
1
1
0
1
Figure 11-22. Start Bit Search Example 1
Figure 11-23. Start Bit Search Example 2
0
1
MC9S12XDP512 Data Sheet, Rev. 2.21
1
1
1
0
0
Perceived Start Bit
0
0
0
0
0
0
Actual Start Bit
Chapter 11 Serial Communication Interface (S12SCIV5)
Start Bit
0
0
0
0
LSB
LSB
505

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