CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 249

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CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
CMP
Operation
RS2 – RS1
RD – IMM16
Subtracts two 16 bit values and discards the result.
CCR Effects
Code and CPU Cycles
Freescale Semiconductor
N:
Z:
V:
C:
CMP RS1, RS2
CMP RS, #IMM16
N
Set if bit 15 of the result is set; cleared otherwise.
Set if the result is $0000; cleared otherwise.
Set if a two´s complement overflow resulted from the operation; cleared otherwise.
RS1[15] & RS2[15] & result[15] | RS1[15] & RS2[15] & result[15]
RD[15] & IMM16[15] & result[15] | RD[15] & IMM16[15] & result[15]
Set if there is a carry from the bit 15 of the result; cleared otherwise.
RS1[15] & RS2[15] | RS1[15] & result[15] | RS2[15] & result[15]
RD[15] & IMM16[15] | RD[15] & result[15] | IMM16[15] & result[15]
Z
V
Source Form
C
NONE (translates to SUB R0, RS1, RS2)
NONE (translates to CMPL RD, #IMM16[7:0]; CPCH RD, #IMM16[15:8])
Address
MC9S12XDP512 Data Sheet, Rev. 2.21
Mode
IMM8
IMM8
TRI
0
1
1
Compare
0
1
1
0
0
0
1
1
1
1
0
1
0
Machine Code
RS
RS
0
0
RS1
IMM16[15:8]
IMM16[7:0]
Chapter 6 XGATE (S12XGATEV2)
RS2
CMP
0
0
Cycles
P
P
P
249

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