CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 279

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CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
STW
Operation
RS
RS
RS
RI–2
Stores the content of register RS to memory.
CCR Effects
Code and CPU Cycles
1. If the same general purpose register is used as index (RI) and source register (RS), the unmodified content of the source
Freescale Semiconductor
N:
Z:
V:
C:
STW RS, (RB, #OFFS5)
STW RS, (RB, RI)
STW RS, (RB, RI+)
STW RS, (RB, -RI)
N
register is written to the memory: RS
Not affected.
Not affected.
Not affected.
Not affected.
Z
M[RB, #OFFS5
M[RB, RI
M[RB, RI]; RI+2
RI; RS
V
Source Form
C
M[RB, RI]
RI;
1
Address
M[RB, RS–2]; RS–2
MC9S12XDP512 Data Sheet, Rev. 2.21
Mode
IDO5
IDR+
-IDR
IDR
Store Word to Memory
0
0
0
0
1
1
1
1
0
1
1
1
RS
1
1
1
1
1
1
1
1
Machine Code
RS
RS
RS
RS
RB
RB
RB
RB
Chapter 6 XGATE (S12XGATEV2)
RI
RI
RI
OFFS5
STW
0
0
1
0
1
0
Cycles
PW
PW
PW
PW
279

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