CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 848

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CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
22.3.2.31 Port M Input Register (PTIM)
1
Read: Anytime.
Write: Never, writes to this register have no effect.
This register always reads back the buffered state of the associated pins. This can also be used to detect
overload or short circuit conditions on output pins.
850
These registers are reset to zero. Two bus clock cycles after reset release the register values are updated with the associated
pin values.
Reset
W
R
1
PTIM7
7
= Unimplemented or Reserved
PTIM6
6
Figure 22-33. Port M Input Register (PTIM)
MC9S12XDP512 Data Sheet, Rev. 2.21
PTIM5
5
PTIM4
4
PTIM3
3
PTIM2
2
Freescale Semiconductor
PTIM1
1
PTIM0
0

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