CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 79
CSM9S12XDT512SLK
Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet
1.MC9S12XD64CAA.pdf
(1348 pages)
Specifications of CSM9S12XDT512SLK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 79 of 1348
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Chapter 2
Clocks and Reset Generator (S12CRGV6)
2.1
This specification describes the function of the clocks and reset generator (CRG).
2.1.1
The main features of this block are:
Freescale Semiconductor
•
•
•
•
•
Phase locked loop (PLL) frequency multiplier
— Reference divider
— Automatic bandwidth control mode for low-jitter operation
— Automatic frequency lock detector
— Interrupt request on entry or exit from locked condition
— Self clock mode in absence of reference clock
System clock generator
— Clock quality check
— User selectable fast wake-up from Stop in self-clock mode for power saving and immediate
— Clock switch for either oscillator or PLL based system clocks
Computer operating properly (COP) watchdog timer with time-out clear window
System reset generation from the following possible sources:
— Power on reset
— Low voltage reset
— Illegal address reset
— COP reset
— Loss of clock reset
— External pin reset
Real-time interrupt (RTI)
Introduction
program execution
Features
MC9S12XDP512 Data Sheet, Rev. 2.21
79
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