CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 210

• Manufacturer Part Number: CSM9S12XDT512SLK
• Description: KIT STUDENT LEARNING 16BIT
• Manufacturer: Freescale Semiconductor

Specifications of CSM9S12XDT512SLK

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 6 XGATE (S12XGATEV2)
6.8.1.4
The 4 bit wide immediate addressing mode is supported by all shift instructions.
RD = RD imm4
Examples:
6.8.1.5
The 8 bit wide immediate addressing mode is supported by four major commands (ADD, SUB, LD, CMP).
RD = RD imm8
Examples:
6.8.1.6
The 16 bit wide immediate addressing mode is a construct to simplify assembler code. Instructions which
offer this mode are translated into two opcodes using the eight bit wide immediate addressing mode.
RD = RD imm16
Examples:
6.8.1.7
In this addressing mode only one operand is explicitly given. This operand can either be the source (f(RD)),
the target (RD = f()), or both source and target of the operation (RD = f(RD)).
Examples:
210
LSL
LSR
ADDL
SUBL
LDH
CMPL
LDW
ADD
JAL
SIF
Immediate 4 Bit Wide (IMM4)
Immediate 8 Bit Wide (IMM8)
Immediate 16 Bit Wide (IMM16)
Monadic Addressing (MON)
R4,#1
R4,#3
R1,#1
R2,#2
R3,#3
R4,#4
R4,#$1234
R4,#$5678
R1
R2
; R4 = R4 << 1; shift register R4 by 1 bit to the left
; R4 = R4 >> 3; shift register R4 by 3 bits to the right
; adds an 8 bit value to register R1
; subtracts an 8 bit value from register R2
; loads an 8 bit immediate into the high byte of Register R3
; compares the low byte of register R4 with an immediate value
; PC = R1, R1 = PC+2
; Trigger IRQ associated with the channel number in R2.L
MC9S12XDP512 Data Sheet, Rev. 2.21
; translated to LDL R4,#$34; LDH R4,#$12
; translated to ADDL R4,#$78; ADDH R4,#$56
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