CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 555

• Manufacturer Part Number: CSM9S12XDT512SLK
• Description: KIT STUDENT LEARNING 16BIT
• Manufacturer: Freescale Semiconductor

Specifications of CSM9S12XDT512SLK

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 14
Voltage Regulator (S12VREG3V3V5)
14.1
Module VREG_3V3 is a dual output voltage regulator that provides two separate 2.5V (typical) supplies
differing in the amount of current that can be sourced. The regulator input voltage range is from 3.3V up
to 5V (typical).
14.1.1
Module VREG_3V3 includes these distinctive features:
14.1.2
There are three modes VREG_3V3 can operate in:
Freescale Semiconductor
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1. Full performance mode (FPM) (MCU is not in stop mode)
2. Reduced power mode (RPM) (MCU is in stop mode)
3. Shutdown mode
Two parallel, linear voltage regulators
— Bandgap reference
Low-voltage detect (LVD) with low-voltage interrupt (LVI)
Power-on reset (POR)
Low-voltage reset (LVR)
Autonomous periodical interrupt (API)
The regulator is active, providing the nominal supply voltage of 2.5 V with full current sourcing
capability at both outputs. Features LVD (low-voltage detect), LVR (low-voltage reset), and POR
(power-on reset) are available. The API is available.
The purpose is to reduce power consumption of the device. The output voltage may degrade to a
lower value than in full performance mode, additionally the current sourcing capability is
substantially reduced. Only the POR is available in this mode, LVD and LVR are disabled. The API
is available.
Controlled by VREGEN (see device level specification for connectivity of VREGEN).
This mode is characterized by minimum power consumption. The regulator outputs are in a
high-impedance state, only the POR feature is available, LVD and LVR are disabled. The API
internal RC oscillator clock is not available.
This mode must be used to disable the chip internal regulator VREG_3V3, i.e., to bypass the
VREG_3V3 to use external supplies.
Introduction
Features
Modes of Operation
MC9S12XDP512 Data Sheet, Rev. 2.21
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