CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 397

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CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
9.2
The IICV2 module has two external pins.
9.2.1
This is the bidirectional serial clock line (SCL) of the module, compatible to the IIC bus specification.
9.2.2
This is the bidirectional serial data line (SDA) of the module, compatible to the IIC bus specification.
9.3
This section provides a detailed description of all memory and registers for the IIC module.
9.3.1
The memory map for the IIC module is given below in
the address offset.The total address for each register is the sum of the base address for the IIC module and
the address offset for each register.
Freescale Semiconductor
External Signal Description
Memory Map and Register Definition
IIC_SCL — Serial Clock Line Pin
IIC_SDA — Serial Data Line Pin
Module Memory Map
MC9S12XDP512 Data Sheet, Rev. 2.21
Table
Chapter 9 Inter-Integrated Circuit (IICV2) Block Description
1-1. The address listed for each register is
397

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