CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 671

Manufacturer Part Number

CSM9S12XDT512SLK

KIT STUDENT LEARNING 16BIT

Manufacturer

Freescale Semiconductor

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

The MMC block performs several basic functions of the S12X sub-system operation: MCU operation

modes, priority control, address mapping, select signal generation and access limitations for the system.

Each aspect is described in the following subsections.

Freescale Semiconductor

Normal single-chip mode

There is no external bus in this mode. The MCU program is executed from the internal memory

and no external accesses are allowed.

Special single-chip mode

This mode is generally used for debugging single-chip operation, boot-strapping or security related

operations. The active background debug mode is in control of the CPU code execution and the

BDM ﬁrmware is waiting for serial commands sent through the BKGD pin. There is no external

bus in this mode.

Emulation single-chip mode

Tool vendors use this mode for emulation systems in which the user’s target application is normal

single-chip mode. Code is executed from external or internal memory depending on the set-up of

the EROMON bit (see

is active in both cases to allow observation of internal operations (internal visibility).

Functional Description

MCU Operating Mode

Section 18.3.2.5, “MMC Control Register

MC9S12XDP512 Data Sheet, Rev. 2.21

Chapter 18 Memory Mapping Control (S12XMMCV3)

(MMCCTL1)). The external bus