CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 1292
CSM9S12XDT512SLK
Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet
1.MC9S12XD64CAA.pdf
(1348 pages)
Specifications of CSM9S12XDT512SLK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Appendix C Recommended PCB Layout
Appendix C
Recommended PCB Layout
The PCB must be carefully laid out to ensure proper operation of the voltage regulator as well as of the
MCU itself. The following rules must be observed:
1294
•
•
•
•
•
•
•
Every supply pair must be decoupled by a ceramic capacitor connected as near as possible to the
corresponding pins (C1–C6).
Central point of the ground star should be the V
Use low ohmic low inductance connections between V
V
Keep traces of V
C8, and Q1 as small as possible.
Do not place other signals or supplies underneath area occupied by C7, C8, and Q1 and the
connection area to the MCU.
Central power input should be fed in at the V
SSPLL
must be directly connected to V
SSPLL
, EXTAL, and XTAL as short as possible and occupied board area for C7,
MC9S12XDP512 Data Sheet, Rev. 2.21
SSR
.
DDA
SSR
/V
SSA
pin.
SS1
pins.
, V
SS2
, and V
SSR
.
Freescale Semiconductor
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